000			01811cam a22004337a 4500
999			_c28634 _d28605
001			14608498
003			EG-ScBUE
005			20200831134942.0
008			061024t2002 enka f bd 001 0 eng d
020			_a0852960395
035			_a(OCoLC)ocm48026089
040			_aUKM _beng _erda _cUKM _dCUS _dTXA _dOCLCQ _dOCL _dBAKER _dDLC _dEG-ScBUE
082	0	4	_a621.38152 _bSIL _222
245	0	0	_aSilicon wafer bonding technology : _bfor VLSI and MEMS applications / _cedited by Subramanian S. Iyer, IBM microelectronics division, Hopewell Junction, USA and Andre J. Auberton-Hervé, SOITEC, France.
264		1	_aLondon, United Kingdom : _bINSPEC, _c[2002]
264		4	_cc2002
300			_axxv, 149 pages : _billustrations ; _c26 cm.
336			_2rdacontent _atext _btxt
337			_2rdamedia _aunmediated _bn
338			_2rdacarrier _avolume _bnc
490	0		_aEMIS processing series ; _v1
500			_aIncludes glossary.
500			_aIncludes appendices.
504			_aIncludes bibliographical references and index.
650		7	_aSilicon-on-insulator technology. _2BUEsh
650		7	_aIntegrated circuits _xVery large scale integration. _2BUEsh
650		7	_aMicroelectromechanical systems. _2BUEsh
653			_bGGEN _cAugust2020
655			_vReading book _934232
700	1		_aIyer, Subramanian S., _eeditor. _917864
700	1		_aAuberton-Hervé, Andre J., _eeditor.
710	2		_aInstitution of Electrical Engineers, _eeditor.
710	2		_aINSPEC. _bEMIS Group.
856	4	1	_3Table of contents only _uhttp://www.loc.gov/catdir/toc/fy0705/2006284940.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0651/2006284940-d.html
906			_a7 _bcbc _ccopycat _d2 _encip _f20 _gy-gencatlg
942			_2ddc _cBB