01519nac a22003371u 4500010001700000020001500017020002100032020001800053035002300071082001800094090001500112100003400127245013000161246011100291260006000402300005700462440006600519500007800585500002700663504005100690511002800741650004800769650005000817700001900867700002900886700003400915856009100949942002001040999001501060952010601075  a  2005052941  a0849379245  a0849330963 (set)  a9780849379246  a(OCoLC)ocm6174850000a621.3815bSCH  c8293d8293  aScheffer, Louis [ed.]        00aEDA for IC implementation, circuit design, and process technology /cedited by Louis Scheffer, Luciano Lavagno, Grant Martin.3 aElectronic design automation for integrated circuit implementation, circuit design, and process technology  aBoca Raton, FL :bCRC Taylor & Francis,c.2006.cc.2006.  a1 v. (various pagings) :bill. (some col.) ;c27 cm. 0aElectronic design automation for integrated circuits handbook  aCompanion volume of: EDA for IC system design, verification, and testing.  aDistributer: Al-Ahram.  aIncludes bibliographical references and index.  aCatalogued By: Mahitab. 0aIntegrated circuitsxComputer-aided design. 0aIntegrated circuitsxDesign and construction.1 aScheffer, Lou.1 aLavagno, Luciano,d1959-1 aMartin, Grantq(Grant Edmund)423Publisher descriptionuhttp://www.loc.gov/catdir/enhancements/fy0664/2005052941-d.html  cBBk621.3815SCH  c8293d8293  00104070aMAINbMAINc1STd2008-03-02ePurchasel0o621.3815SCHp000009958r2025-07-15 00:00:00yBB