01532nac a22003491u 4500010001700000020001500017020001800032020002100050020002400071035002300095035002000118082001800138090001500156100003400171245011600205246009700321260005500418300004500473440006600518500009200584504005100676511002700727650004800754650005600802700002900858700002900887700003400916856009100950942002001041999001501061952010601076  a  2005052924  a0849379237  a9780849379239  a0849330963 (set)  a9780849330964 (set)  a(OCoLC)ocm61748498  a(OCoLC)6174849800a621.3815bSCH  c8235d8235  a20080729                     00aEDA for IC system design, verification, and testing /cedited by Louis Scheffer, Luciano Lavagno, Grant Martin.3 aElectronic design automation for integrated circuit system design, verification, and testing  aBoca Raton, FL :bCRC Taylor & Francis,2006c2006.  a1 v. (various pagings) :bill. ;c27 cm. 0aElectronic design automation for integrated circuits handbook  aCompanion volume of: EDA for IC implementation, circuit design, and process technology.  aIncludes bibliographical references and index.  acatalogued  by: wessam 0aIntegrated circuitsxComputer-aided design. 0aIntegrated circuitsxVerificationxData processing.1 aScheffer, Louis Kossuth.1 aLavagno, Luciano,d1959-1 aMartin, Grantq(Grant Edmund)423Publisher descriptionuhttp://www.loc.gov/catdir/enhancements/fy0654/2005052924-d.html  cBBk621.3815SCH  c8235d8235  00104070aMAINbMAINc1STd2008-02-28ePurchasel0o621.3815SCHp000009892r2025-07-15 00:00:00yBB